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Understanding the heavy copper circuit’s basic construction allows full appreciation of its capabilities and potential applications.

March 7, 2013

The designs of various power electronics products are for a range of every day applications. Increasingly, these projects are taking advantage of a growing trend in the printed circuit board industry: heavy copper and EXTREME Copper printed circuit boards (PCB).

What defines a heavy copper circuit? The manufacture of most commercially available PCBs is for low-voltage/low-power applications, with copper traces/planes made up of copper weights ranging from 0.5oz/ft2 to 3oz/ft2. A heavy copper circuit is manufactured with copper weights anywhere between 4oz/ft2 to 20oz/ft2. Copper weights above 20oz/ft2 and up to 200oz/ft2 are also possible and are referred to as EXTREME Copper.

For our discussion, we will focus primarily on heavy copper. The increased copper weight combined with a suitable substrate and thicker plating in the through holes transforms the once unreliable, weak circuit board into a durable and reliable wiring platform.

The construction of a heavy copper circuit endows a board with benefits such as:

  • Increased endurance to thermal strains
  • Increased current carrying capacity
  • Increased mechanical strength at connector sites and in plated through holes (PTH)
  • Use of exotic materials to their full potential (i.e., high temperature) without circuit failure
  • Reduced product size by incorporating multiple copper weights on the same layer of circuitry
  • Heavy copper-plated vias carry higher current through the board and help to transfer heat to an external heatsink
  • On-board heatsinks directly plated onto the board surface using up to 120oz copper planes
  • On-board high-power-density planar transformers

Although the disadvantages are few, it is important to understand the heavy copper circuit’s basic construction to appreciate its capabilities and potential applications fully.


Heavy Copper Construction

Standard printed circuit boards, whether double-sided or multi-layer, are manufactured using a combination of copper etching and plating processes. Circuit layers starting as thin sheets of copper foil (generally 0.5oz/ft2 to 2oz/ft2) are etched to remove unwanted copper, and are plated to add copper thickness to planes, traces, pads, and plated-through-holes. All circuit layers are laminated into a complete package using an epoxy-based substrate, such as FR4 or polyimide.

Boards incorporating heavy copper circuits are produced in exactly the same way, albeit with specialized etching and plating techniques, such as high-speed/step plating and differential etching. Historically, forming of heavy copper features was entirely by etching thick, copper-clad laminated board material, causing uneven trace sidewalls and unacceptable undercutting. Advances in plating technology have allowed heavy copper features to be formed with a combination of plating and etching, resulting in straight sidewalls and negligible undercut.

Plating of a heavy copper circuit enables the board fabricator to increase the amount of copper thickness in plated holes and via sidewalls. It is now possible to mix heavy copper with standard features on a single board, known as PowerLink. Advantages include reduced layer count, low impedance power distribution, smaller footprints, and potential cost savings. Normally, high-current/high-power circuits and their control circuits are produced independently on separate boards. Heavy copper plating makes it possible to integrate high-current circuits and control circuits to realize a highly dense yet simple board structure.

The heavy copper features can be seamlessly connected to standard circuits. Heavy copper and standard features can be placed with minimal restriction provided the designer and fabricator discuss manufacturing tolerances and abilities prior to final design.


Capacity, Temperature Rise

How much current can a copper circuit safely carry? This is a question often voiced by designers who wish to incorporate heavy copper circuits into their project. Answering this question is usually done with another question: How much heat rise can your project withstand? Posing this question is because heat rise and current flow go hand in hand. Let us try to answer both of these questions together.

When current flows along a trace, there is an I2R (power loss) that results in localized heating. The trace cools by conduction (into neighboring materials) and convection (into the environment). Therefore, to find the maximum current a trace can safely carry, we must find a way to estimate the heat rise associated with the applied current. An ideal situation would be to reach a stable operating temperature where the rate of heating equals the rate of cooling. Fortunately, we have an IPC (Association Connecting Electronics Industries) formula we can use to model this event.

IPC-2221A, calculation for current capacity of an external track [1]:

I = .048 * DT(.44) * (W * Th)(.725)

Where I is current (amps), DT is temperature rise (°C), W is width of the trace (mil), and Th is thickness of the trace (mil). Internal traces should be derated by 50% (estimate) for the same degree of heating. Using the IPC formula generated, Figure 3 shows the current carrying capacity of several traces of differing cross-sectional areas with a 30°C temperature rise.

What constitutes an acceptable amount of heat rise will differ from project to project. Most circuit board dielectric materials can withstand temperatures of 100°C above ambient, although this amount of temperature change would be unacceptable in most situations.


Strength, Survivability

Circuit board manufacturers and designers can choose from a variety of dielectric materials, from standard FR4 (operating temperature 130°C) to high-temperature polyimide (operating temperature 250°C). A high-temperature or extreme environment situation may call for an exotic material, but if the circuit traces and plated vias are standard 1oz/ft2, then will they survive the extreme conditions?

The circuit board industry has developed a test method for determining the thermal integrity of a finished circuit product. Thermal strains come from various board fabrication, assembly, and repair processes, where the differences between the coefficient of thermal expansion (CTE) of Cu and the printed wiring board (PWB) laminate provide the driving force for crack nucleation and growth to failure of the circuit. Thermal cycle testing (TCT) checks for an increase in resistance of a circuit as it undergoes air-to-air thermal cycling from 25°C to 260°C.

An increase in resistance indicates a breakdown in electrical integrity via cracks in the copper circuit. A standard coupon design for this test utilizes a chain of 32 plated through holes, which has long been considered to be the weakest point in a circuit when subjected to thermal stress.

Thermal cycle studies done on standard FR4 boards with 0.8mil to 1.2mil copper plating have shown that 32% of circuits fail after eight cycles (a 20% increase in resistance is a failure). Thermal cycle studies done on exotic materials show significant improvements to this failure rate (3% after eight cycles for cyanate ester), but are prohibitively expensive (five to 10 times material cost) and difficult to process. An average surface-mount technology assembly sees a minimum of four thermal cycles before shipment, and could see an additional two thermal cycles for each component repair.

It is reasonable for a SMOBC (solder mask over bare copper) board that has gone through a repair and replacement cycle to reach a total of nine or 10 thermal cycles. The TCT results clearly show that the failure rate, no matter what the board material, can become unacceptable. Printed circuit board manufacturers know that copper electroplating is not an exact science – changes in current densities across a board and through numerous hole/via sizes result in copper thickness variations of up to 25% or more. Most areas of thin copper are on plated-hole walls – the TCT results clearly show this to be the case.

Using heavy copper circuits would reduce or eliminate these failures altogether. Plating of 2oz/ft2 of copper to a hole wall reduces the failure rate to almost zero (TCT results show a 0.57% failure rate after eight cycles for standard FR4 with a minimum of 2.5mil copper plating). In effect, the copper circuit becomes impervious to the mechanical stresses placed on it by the thermal cycling.


Thermal Management
As designers strive to obtain maximum value and performance from their projects, printed circuits are becoming more complex and are driven to higher power densities. Miniaturization, use of power components, extreme environmental conditions, and high-current requirements increase the importance of thermal management. The higher losses in the form of heat, often generated in the operation of electronics, have to be dissipated from its source and radiated to the environment; otherwise, the components could overheat and failures may result. However, heavy copper circuits can help by reducing the I2R losses and by conducting heat away from valuable components, reducing failure rates dramatically.

In order to achieve proper heat dissipation from heat sources in and on the surface of a circuit board, heatsinks are employed. The purpose of any heatsink is to dissipate heat away from the source of generation by conduction, emitting this heat by convection to the environment. The heat source on one side of the board (or internal heat sources) is connected by copper vias (also called heat vias) to a large bare copper area on the other side of the board.

Generally, classical heatsinks are bonded to this bare copper surface by means of a thermally-conductive adhesive or, in some cases, are riveted or bolted. Most heatsinks are made of either copper or aluminum. The assembly process required for classical heatsinks consists of three labor-intensive and costly steps.

To begin, the metal serving as the heatsink must be punched or cut to the required shape. The adhesive layer must also be cut or stamped for a precision fit between the circuit board and the heatsink. Last, but not least, the heatsink must be properly positioned on the PCB, and the entire package has to be coated for electrical and/or corrosion resistance with a suitable lacquer or cover coat.
 

 

Normally, the above process cannot be automated and must be done by hand. The time and work required to complete this process is significant, and the results are inferior to a mechanically automated process. In contrast, the creation of built-in heatsinks occurs during the printed circuit board manufacturing process and requires no additional assembly. Heavy copper circuit technology makes this possible. This technology allows the addition of thick copper heatsinks virtually anywhere on the outer surfaces of a board. The heatsinks are electroplated on the surface and connected to the heat conducting vias without any interfaces that impede thermal conductivity.

Another benefit is the added copper plating in the heat vias, which reduces the thermal resistance of the board design, realizing that they can expect the same degree of accuracy and repeatability inherent in PCB manufacturing. Because planar windings are actually flat conductive traces formed on copper clad laminate, they improve the overall current density compared to cylindrical wire conductors. This benefit is due to minimization of skin effect and higher current-carrying efficiency.

On-board planars achieve excellent primary-to-secondary and secondary-to-secondary dielectric isolation because the same dielectric material is used between all layers, ensuring complete encapsulation of all windings. In addition, primary windings can be spilt so that the secondary windings are sandwiched between the primaries, achieving low leakage inductance. Standard PCB lamination techniques, using a choice of a variety of epoxy resins, can safely sandwich up to 50 layers of copper windings as thick as 10oz/ft2.

During the manufacture of heavy copper circuits, engineers are usually dealing with significant plating thicknesses; therefore, allowances must be made in defining trace separations and pad sizes. For this reason, designers are advised to have the board fabricator on board early in the design process. Epec Engineered Technologies has developed a set of design guidelines for heavy copper circuits that give designers a basic overview of what is required.


Military Applications
Traditionally, when PCBs are used in military applications, the designers create the high current circuits by adding duplicate layers of 3oz or 4oz copper in parallel and crossing their fingers that the layers share the current between them evenly. In practice, the sharing is less than ideal so some layers tend to carry a higher percentage of the load and generate higher losses. Overall, the board normally runs hotter than estimated during the design.

Utilizing heavy or EXTREME Copper in creating the high current circuits, combined with thicker copper plating in the vias and plated through holes, will eliminate the need to add duplicate layers in parallel, thereby eliminating any concern of load sharing among multiple layers. Temperature rise due to losses in the boards can be calculated with greater certainty. The thick copper plating in the holes dramatically reduces failures associated with thermal stress. The result is a cooler running and more reliable PCB.

Heavy Copper, EXTREME Copper, or PowerLink find use in the following:

  • Weapons control systems
  • Power supplies for radar systems
  • Creation primary and secondary windings of high power planar transformers
  • Power distribution panels
  • Battery charger and monitoring systems

Power electronics products using heavy copper circuitry have been in use for many years in the military and aerospace industry and are gaining momentum as a technology of choice in industrial applications. It is believed that market requirements will extend the application of this type of product in the near future.

References: [1] IPC -2221A

 

Epec Engineered Technologies
New Bedford, MA
www.epectec.com